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PRODUCT DATASHEET
AAT2783
SystemPowerTM
General Description
Triple Output PMIC: Dual Buck with Low-VIN LDO
Features
* * * * VIN Range Step-Down (Buck): 2.7V to 5.5V VIN Range Low Drop-Out (LDO): 1.5V to 5.5V Output Voltage Range: 0.6V to VIN Step-Down Output Current: Channel 1: 1000mA Channel 2: 400mA LDO Output Current: Channel 3: 400mA High Efficiency with Low RDS(ON) Switches Step-Down up to 97% LDO Regulator up to 80% Total Quiescient Current 135A Shutdown Current: 1A Step-Down Converters 1.3MHz Switching Frequency Current Mode Control Cycle-by-Cycle Current Limit High Efficiency Light-Load Mode Operation LDO Converter Ultra Low Noise with Bypass Capacitor Over-Current Protection 200s Internal Soft Start Over-Temperature Protection TDFN34-16 Low Profile Package -40C to 85C Temperature Range
The AAT2783 provides three independently regulated DC outputs: two step-down (Buck) regulators and a single low input voltage, low drop-out (LDO) regulator. The input voltage range for the step-down regulators is 2.7V to 5.5V, while the LDO regulator allows inputs from 1.5V to 5.5V. The low input voltage LDO regulator allows high efficiency, step-down, low noise outputs. In addition, the LDO input may be connected to step-down outputs 1 or 2. The Channel 1 and 2 step-down regulators can deliver up to 1000mA and 400mA output current, respectively. Step-down output voltages are set with external resistors. Switching frequency is set at 1.3MHz to ensure small external filtering components. Current mode control assures fast transient response and stable operation across the operating range. The Channel 3 LDO regulator can deliver up to 400mA with -80dB power supply rejection ratio (PSRR) and 65VRMS output noise with an optional bypass capacitor. The LDO output voltage is factory set with a default voltage of 1.20V. Independent enable and input pins are provided. The device consumes low quiescent current and provides high efficiency across the load range for maximum life in battery systems. The AAT2783 is available in the Pb-free, 16-pin TDFN34 package and is rated over the -40C to 85C operating temperature range.
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Applications
* * * * * Cellular and SmartPhones Microprocessor / DSP Core / IO Power PDAs and Handheld Computers Portable Media Players Wireless Data Systems
Typical Application
VIN 2.7V -5.5V VP1 EN1 VIN C1 10F C4 0.1F AGND GND1 L2 2.2H VP2 EN2 FB2 R2 59.0k GND2 VIN = VOUT2 VIN3 EN3 C3 2.2F AGND EP OUT3 BYP C7 0.01F C2 10F GND2 VOUT3 1.2V, 400mA LX2 R3 107k VOUT2 1.7V, 0.4A FB1 R4 59.0k AAT2783 LX1 R5 59.0k C8 10F L1 1.5H VOUT1 1.2V, 1.0A
C5 4.7F
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Pin Descriptions
Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Triple Output PMIC: Dual Buck with Low-VIN LDO
Symbol
FB2 EN3 VIN AGND BYP EN2 EN1 FB1 LX1 GND1 VP1 VP2 GND2 LX2 VIN3 OUT3 EP
Function
Feedback input pin for Channel 2. Connect an external resistor divider to this pin to program the output voltage to the desired value. Enable Channel 3 input. Pull logic high to enable LDO Channel 3 converter. Pull logic low to disable. Channel 3 will turn on when EN3 is high and Channel 2 is in regulation. Input voltage pin. Connect this pin to input voltage source. Analog ground pin. Connect to ground plane. LDO bypass pin. Connect a 10nF ceramic capacitor from this pin to ground plane for low output noise. Enable Channel 2 input. Pull logic high to enable step-down Channel 2 converter. Pull logic low to disable. Enable Channel 1 input. Pull logic high to enable step-down Channel 1 converter. Pull logic low to disable. Channel 1 feedback pin internally set to 0.6V. Connect resistor divider and optional feed-forward capacitor to this pin to set the Channel 1 voltage and adjust transient load response (see Table 1). Channel 1 converter switching pin. Connect Channel 1 inductor to this pin. Inductor value is determined by output voltage (see Table 2). Power return pin for output 1 step-down converter. Connect returns of Channel 1 input and output capacitors close to this pin for best noise performance. Input supply voltage pin for Channel 1 step-down converter. Connect the input capacitor close to this pin for best noise performance. Input supply voltage pin for Channel 2 step-down converter. Connect the input capacitor close to this pin for best noise performance. Power return pin for Channel 2 step-down converter. Connect returns of Channel 2 input and output capacitors close to this pin for best noise performance. Channel 2 converter switching pin. Connect output 2 inductor to this pin. Inductor value is determined by output voltage (see Table 2). Input supply voltage pin for output 3 low-noise LDO converter. Connect the input capacitor close to this pin for best noise performance. Channel 3 LDO step-down converter output pin. Connect this pin to a 10F ceramic capacitor. Exposed pad. Connect to ground as close as possible to the device. Use properly sized vias for thermal coupling to the ground plane. See section on PCB layout guidelines.
Pin Configuration
TDFN34-16 (Top View)
FB2 EN3 VIN AGND BYP EN2 EN1 FB1
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
OUT3 VIN3 LX2 GND2 VP2 VP1 GND1 LX1
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PRODUCT DATASHEET
AAT2783
Value Units
V V V V V V C C
SystemPowerTM
Absolute Maximum Ratings1
Symbol
VIN VIN3 VOUT3 VLX VFB VEN TJ TLEAD
Triple Output PMIC: Dual Buck with Low-VIN LDO
Description
VP1, VP2, VIN to GND1, GND2, AGND VIN3 to GND1, GND2, AGND OUT3 to GND1, GND2, AGND LX1, LX2 to GND1, GND2, AGND FB1, FB2, BYP to GND1, GND2, AGND EN1, EN2, EN3 to GND1, GND2, AGND Operating Junction Temperature Range Maximum Soldering Temperature (at leads, 10 sec)
-0.3 to 6.0 -0.3 to 6.0 -0.3 to VIN3 + 0.3 -0.3 to VIN + 0.3 -0.3 to VIN + 0.3 -0.3 to 6.0 -40 to 150 300
Thermal Information
Symbol
PD JA
Description
Maximum Power Dissipation Thermal Resistance3
2
Value
2.0 50
Units
W C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Derate 20mW/C above 25C ambient temperature. 3. Mounted on an FR4 board with exposed paddle connected to ground plane.
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Electrical Characteristics1
Triple Output PMIC: Dual Buck with Low-VIN LDO
VP1 = VP2 = VIN = 3.3V; VIN3=1.7V, TA = -40C to 85C, unless noted otherwise. Typical values are at TA = 25C. Symbol
General VIN VUVLO IQ ISHDN TSD THYS VIL VIH
Description
Input Voltage UVLO Threshold Quiescent Current Shutdown Current Over Temperature Shutdown Threshold Over Temperature Shutdown Hysteresis Enable Threshold Low Enable Threshold High
Conditions
Min
2.7
Typ
Max
5.5 2.7
Units
V V mV V A A C C
VP1 Rising VP1 Hysteresis VP1 Falling No load; EN1 = EN2 =EN3 = VIN EN1 = EN2 =EN3 = GND
140 2.1 240 1.0 130 20
For EN1, EN2, and EN3 For EN1, EN2, and EN3 1.4 -1.0 2.7 0.6 -3.0 0.591
0.6 1.0 5.5 VP1 3.0 0.609
V V A V V % V % % A A m m MHz s
IEN Enable Input Current VIN = VP1 = VP2 = VEN1 = VEN2 = VEN3 = 5.5V Channel 1: 1000mA Step-down (Buck) Converter VP1 Input Voltage VOUT1 Output Voltage Range VOUT1(TOL) Output Voltage Tolerance IOUT1 = 0 to 1000mA; VP1 = 2.7 to 5.5V VFB1 Feedback Pin Voltage VLOADREG1 Load Regulation IOUT1 = 0 to 1000mA VLINEREG1 Line Regulation VP1 = 2.7 to 5.5V IQ1 Quiescent Current No load; EN1 = VIN; EN2 = EN3 = GND P-Channel Current Limit ILIM1 RDS(ON)H1 High Side Switch On-Resistance RDS(ON)L1 Low Side Switch On-Resistance FOSC1 Oscillator Frequency TS1 Start-Up Time From Enable to Output Regulation
0.6 0.2 0.3 65 1.7 250 190 1.3 200
1. The AAT2783 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization and correlation with statistical process controls.
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2783.2008.03.1.0
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Electrical Characteristics1
Triple Output PMIC: Dual Buck with Low-VIN LDO
VP1 = VP2 = VIN = 3.3V; VIN3=1.7V, TA = -40C to 85C, unless noted otherwise. Typical values are at TA = 25C. Symbol Description Conditions Min
2.7 0.6 -3.0 0.591
Typ
Max
5.5 VP2 3.0 0.609
Units
V V % V % % A A m m MHz s V mV
Channel 2: 400mA Step-down (Buck) Converter VP2 Input Voltage VOUT2 Output Voltage Range VOUT2(TOL) Output Voltage Tolerance IOUT2= 0 to 400mA; VP1 = 2.7 to 5.5V VFB2 Feedback Pin Voltage VLOADREG2 Load Regulation IOUT2 = 0 to 400mA VLINEREG2 Line Regulation VP2 = 2.7 to 5.5V IQ2 Quiescent Current No Load; EN2 = VIN; EN1 = EN3 = GND ILIM2 P-Channel Current Limit RDS(ON)H2 High Side Switch On-Resistance RDS(ON)L2 Low Side Switch On-Resistance Oscillator Frequency FOSC2 TS2 Start-Up Time From Enable to Output Regulation Channel 3: 400mA Low Dropout (LDO) Converter VIN3 Input Voltage IOUT3 = 150mA; VOUT3 > 1.20V VDO3 Dropout Voltage IOUT3 = 400mA; VOUT3 > 1.20V VIN3 = VOUT3 + VDO3 to 5.5V; IOUT3 = 0mA LDO Output Voltage Tolerance VOUT3 to 400mA IOUT3 Max Output Current VOUT3 = 1.2V ISC Short-Circuit Current VOUT3 < 0.4V IQ Quiescent Current No Load; EN1 = EN2 = GND; EN3 = VIN TS Start-Up Time From Enable to Output Regulation 10Hz, IOUT3 = 10mA 3kHz, IOUT3 = 10mA PSRR Power Supply Rejection Ratio 30kHz, IOUT3 = 10mA 300kHz, IOUT3 = 10mA BW = 100Hz to 300kHz, CBYP = 10nF, eN Output Noise IOUT3 = 10mA
0.6 0.5 0.3 65 1.7 250 190 1.3 200
VOUT3 + VDO3 140 300 1.164 400 1.1 70 200 85 80 60 55 65 1.200
5.5
1.236
V mA A A s dB dB dB dB VRMS
1. The AAT2783 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization and correlation with statistical process controls.
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Typical Characteristics
Step-Down Converter and LDO Input Current vs. Input Voltage
180
Triple Output PMIC: Dual Buck with Low-VIN LDO
Step-Down Converter Switching Frequency vs. Temperature
Switching Frequency (MHz) (VIN = 3.3V; IOUT1 = 1A; IOUT2 = 0.4A)
1.31 1.30 1.29 1.28 1.27 1.26 1.25 -40
(VEN1 = VEN2 = VEN3 = VIN) Input Current (A)
170 160 150 140 130 120 110 100 2.5 3
85C
25C
-40C
3.5 4 4.5 5 5.5 6
VOUT2 = 1.7V VOUT1 = 1.2V
-20 0 20 40 60 80 100
Input Voltage (V)
Temperature (C)
Step-Down Converter Switching Frequency vs. Input Voltage
(IOUT1 = 1A; IOUT2 = 0.4A) Frequency Variation (%)
3 2 1 0 -1 -2 -3 2.7
VOUT2 = 1.7V VOUT1 = 1.2V
3.1 3.5 3.9 4.3 4.7 5.1 5.5
Input Voltage (V)
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2783.2008.03.1.0
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Typical Characteristics--Buck Converter 1
Step-Down Converter 1 Efficiency vs. Load
(VOUT1 = 1.2V; L = 1.7H)
100 90 0.50
Step-Down Converter 1 DC Regulation
(VOUT1 = 1.2V; VIN = 2.7 to 5.5V; L = 1.7H)
VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5V VIN = 5.5V
Output Error (%)
Efficiency (%)
80 70 60 50 40 30 20 10 0.1 1 10 100
0.25
VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5V VIN = 5.5V
1000 10000
0.00
-0.25
-0.50 0.1
1
10
100
1000
10000
Output Current (mA)
Output Current (mA)
Step-Down Converter 1 VIH and VIL vs. Input Voltage
(VEN1 = VIN; VEN2 = 0V; VEN3 = 0V)
1.0 90
Step-Down Converter 1 Input Current vs. Input Voltage
(VEN1 = VIN; VEN2 = VEN3 = 0V) Input Current (A)
VIH and VIL (V)
0.9
VIH
80
0.8
VIL
70
85C
25C
-40C
0.7
60
0.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
50 2.5
3
3.5
4
4.5
5
5.5
6
Input Voltage (V)
Input Voltage (V)
Step-Down Converter 1 Line Regulation
(VOUT1 = 1.2V; IOUT1 = 0.1mA to 1A; L = 1.7H)
0.5 0.4 0.3
Step-Down Converter Output 1 Voltage Error vs. Temperature
(VIN = 3.3V; VOUT1 = 1.2V, IOUT1 = 1A) Output Voltage Error (%)
1.00 0.75 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -50 -25 0 25 50 75 100
Accuracy (%)
0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5
IOUT1 = 0.10mA IOUT1 = 10mA IOUT1 = 100mA IOUT1 = 1000mA
5.0
5.5
Input Voltage (V)
Temperature (C)
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Typical Characteristics--Buck Converter 1
Step-Down Converter 1 Output Ripple
(VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1A) Output Voltage (AC coupled) (top) (V) Output Voltage (AC coupled) (top) (V)
1.22 1.22
Step-Down Converter 1 Output Ripple
(VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1mA)
Inductor Current (bottom) (A)
Inductor Current (bottom) (A)
1.20 1.18
1.20 1.18
1.2 1.0 0.8
0.2 0.0
Time (500ns/div)
Time (10s/div)
Step-Down Converter 1 Line Transient Response
(VIN = 3V to 4V; VOUT1 = 1.2V; IOUT1 = 1A; COUT = 10F)
5
Step-Down Converter 1 Load Transient Response
(IOUT1 = 750mA to 1A; VIN = 3.3V; COUT1 = 10F; CFF = 100pF) Output Voltage (AC coupled) (middle) (V) Inductor Current (top) (A) Output Current (bottom) (A)
Input Voltage (top) (V)
4 3 2 1.4 1.3 1.2 1.1 1.0
0.75A 1.25 1.20 1.15
1A
Output Voltage (bottom) (A)
0.75A
1A
1.0 0.5
Time (100s/div)
Time (100s/div)
Step-Down Converter 1 Soft Start
(VIN = 3V; VOUT1 = 1.2V; IOUT1 = 1A; CFF = 100pF) Inductor Current (bottom) (A) Enable Voltage (top) (V) Output Voltage (middle) (V)
4 3 2 1 0 1.0 0.5 0.0
Time (50s/div)
8
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2783.2008.03.1.0
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Typical Characteristics--Buck Converter 2
Step-Down Converter 2 Efficiency vs. Load
(VOUT2 = 1.7V; L = 2.2H)
100 90 0.50 0.25
Step-Down Converter 2 DC Regulation
(VOUT2 = 1.7V; VIN = 2.7V to 5.5V; L = 2.2H)
Output Error (%)
Efficiency (%)
80 70 60 50 40 30 20 10 0.1 1 10 100
0.00 -0.25 -0.50 -0.75 -1.00
VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5V VIN = 5.5V
1000 10000
VIN = 2.7V VIN = 3.3V VIN = 3.6V VIN = 4.2V VIN = 5V VIN = 5.5V
0.1 1 10 100 1000 10000
Output Current (mA)
Output Current (mA)
Step-Down Converter 2 VIH and VIL vs. Input Voltage
(VEN1 = 0V; VEN2 = VIN; VEN3 = 0V)
1.0 90
Step-Down Converter 1 Input Current vs. Input Voltage
(VEN2 = VIN; VEN1 = VEN3 = 0V) Input Current (A) 85C
80
VIH and VIL (V)
0.9
VIH VIL
0.8
70
25C -40C
0.7
60
0.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
50 2.5
3
3.5
4
4.5
5
5.5
6
Input Voltage (V)
Input Voltage (V)
Step-Down Converter Output 2 Voltage Error vs. Temperature
(VIN = 3.3V; VOUT2 = 1.7V, IOUT2 = 400mA) Output Voltage Error (%)
1.00 0.75
Step-Down Converter 2 Line Regulation
(VOUT2 = 1.7V; IOUT2 = 0.1mA to 400mA; L = 2.2H)
0.5 0.4 0.3
Accuracy (%)
0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -50 -25 0 25 50 75 100
0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5
IOUT2 = 0.10mA IOUT2 = 10mA IOUT2 = 100mA IOUT2 = 400mA
5.0
5.5
Temperature (C)
Input Voltage (V)
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Typical Characteristics--Buck Converter 2
Step-Down Converter 2 Output Ripple
(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 400mA) Output Voltage (AC coupled) (top) (V) Output Voltage (AC coupled) (top) (V)
1.71
Step-Down Converter 2 Output Ripple
(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 1mA)
Inductor Current (bottom) (A)
Inductor Current (bottom) (A)
1.71 1.70 1.69 0.6 0.4 0.2
1.70 1.69
0.2 0.0
Time (500ns/div)
Time (10s/div)
Step-Down Converter 2 Line Transient Response
(VIN = 3V to 4V; VOUT2 = 1.7V; IOUT2 = 0.4A; COUT2 = 10F)
5
Step-Down Converter 2 Load Transient Response
Output Voltage (AC coupled) (middle) (V) (IOUT2 = 0.3A to 0.4A; VIN = 3.3V; VOUT2 = 1.7V; COUT2 = 4.7F; CFF = 100pF)
0.4A 0.3A 1.75 1.70 1.65 0.6 0.4 0.2 0.0
Inductor Current (top) (A) Output Current (bottom) (A)
Input Voltage (top) (V)
4 3 2 1.9 1.8 1.7 1.6
Output Voltage (bottom) (A)
Time (100s/div)
Time (100s/div)
Step-Down Converter 2 Soft Start
(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 500mA; CFF = 100pF) Inductor Current (bottom) (A) Enable Voltage (top) (V) Output Voltage (middle) (V)
4 3 2 1 0 1.0 0.5 0.0
Time (50s/div)
10
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2783.2008.03.1.0
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Typical Characteristics--LDO
LDO Line Regulation
(VIN3 = VOUT2 = 1.7V; VOUT3 = 1.2V; Vary VIN)
0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Triple Output PMIC: Dual Buck with Low-VIN LDO
LDO VIH and VIL vs. Input Voltage
(VEN1 = 0V; VEN2 = VEN3 = VIN)
1.0
VIH and VIL (V)
Accuracy (%)
IOUT = 0.1mA to 400mA
0.9
VIH VIL
0.8
0.7
0.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage (V)
Input Voltage (V)
LDO Dropout Characteristics
(VIN = 3.3V; Vary VIN3 from 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; -40C) LDO Output Voltage (V) LDO Output Voltage (V)
1.210 1.205 1.200 1.195 1.190 1.185 1.180 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 1.210 1.205 1.200 1.195 1.190 1.185 1.180 1.0
LDO Dropout Characteristics
(VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; 85C)
IOUT3 = 1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA
2.8 3.0 3.2 3.4
IOUT3 = 0.1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA
1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4
Input Voltage (V)
Input Voltage (V)
LDO Dropout Characteristics
1.210 1.205 1.200 1.195 1.190 1.185 1.180 1.0
LDO Load Transient Response
(200mA to 400A; VIN = 3.3V; VIN3 = VOUT2 = 1.7V) LDO Output Voltage (top) (V)
1.25 1.20 1.15 400mA 200mA 0.6 0.4 0.2 0.0
(VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V; IOUT3 = 0.1mA to 400mA; 25C) LDO Output Voltage (V)
LDO Output Current (bottom) (A)
IOUT3 = 0.1mA IOUT3 = 10mA IOUT3 = 50mA IOUT3 = 100mA IOUT3 = 150mA IOUT3 = 300mA IOUT3 = 400mA
1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4
Input Voltage (V)
Time (50s/div)
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Typical Characteristics--LDO
LDO Output Voltage Noise
(IOUT3 = 10mA; Power BW: 100~300KHz)
5.6 4.9
Triple Output PMIC: Dual Buck with Low-VIN LDO
LDO Power Supply Rejection Ratio, PSRR
(IOUT3 = 10mA; BW: 100~300KHz)
140 120
Magnitude (dB)
Noise (V)
4.2 3.5 2.8 2.1 1.4 0.7 0.0 100 1000 10000 100000 1000000
100 80 60 40 20 0 100 1000 10000 100000 1000000
Frequency (Hz)
Frequency (Hz)
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2783.2008.03.1.0
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Functional Block Diagram
Triple Output PMIC: Dual Buck with Low-VIN LDO
VP1 VIN
FB1
Comp. Error Amp
Logic
LX1
EN1
Control Logic
GND1 VP2
OT
OSC
FB2
Comp. Error Amp
Logic
LX2
EN2
Control Logic
GND2
Voltage Ref
VIN3
OUT3
OCP
Error Amp
OUT3 Logic
BYP
Voltage Ref
AGND EN3
Control Logic
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Functional Description
Triple Output PMIC: Dual Buck with Low-VIN LDO
stability for duty cycles greater than 50%. The peak current mode loop appears as a voltage-programmed current source in parallel with the output capacitor. The output of the voltage error amplifier programs the current mode loop for the necessary peak switch current to force a constant output voltage for all load and line conditions. Internal loop compensation terminates the transconductance voltage error amplifier output. The reference voltage is internally set to program the converter output voltage greater than or equal to 0.6V.
The AAT2783 is a 3-channel high performance power management IC. Channel 1 is a 1000mA step-down converter. Channel 2 is a 400mA step-down converter. Channel 3 is a 400mA LDO regulator with low-input voltage capability and low output noise for sensitive analog applications. The low input voltage capability of the LDO regulator allows either step-down converter to be tied directly to the LDO input. This configuration provides the efficiency benefits of a switching converter plus the low noise benefits of a LDO (low drop-out) regulator.
Soft Start/Enable
Soft start limits the current surge seen at the input and eliminates output voltage overshoot. When pulled low, the enable input forces the AAT2783 into a low-power, non-switching state. The total input current during shutdown is less than 1A.
Channel 1 and 2: 1000/400mA Step-Down (Buck) Converters
The AAT2783 Channel 1 and 2 step-down converters are peak current mode PWM converters operating at 1.3MHz frequency. The input voltage range is 2.7V to 5.5V. The output voltage range is 0.6V to VIN and is adjustable with an external resistor divider. The converters provide internal compensation. Power devices are sized for 1A output current while maintaining over 85% efficiency at full load. Peak efficiency is above 95%. Light load efficiency is maintained at greater than 80% down to 85% of full load current. Channel 2 has excellent transient response, load and line regulation. Transient response time is typically less than 20s. The enable inputs, when pulled low, force the converter into a low power non-switching state consuming less than 1A of current. For overload conditions, the peak input current is limited. Also, thermal protection completely disables switching if internal dissipation becomes excessive, thus protecting the device from damage. The junction overtemperature threshold is 130C with 20C of hysteresis. Under-voltage lockout (UVLO) guarantees sufficient VIN bias and proper operation of all internal circuits prior to activation.
Low Dropout Operation
For conditions where the input voltage drops to the output voltage level, the converter duty cycle increases to 100%. As the converter approaches the 100% duty cycle, the minimum off-time initially forces the high side on-time to exceed the 1.3MHz clock cycle and reduces the effective switching frequency. Once the input drops below the level where the converter can regulate the output, the high side P-channel MOSFET is enabled continuously for 100% duty cycle. At 100% duty cycle the output voltage tracks the input voltage minus the I*R drop of the high side P-channel MOSFET.
Current Limit and Over-Temperature Protection
For overload conditions, the peak input current is limited. To minimize power dissipation and stresses under current limit and short-circuit conditions, switching is terminated after entering current limit for a series of pulses. Switching is terminated for seven consecutive clock cycles after a current limit has been sensed for a series of four consecutive clock cycles. Thermal protection completely disables switching when internal dissipation becomes excessive. The junction over-temperature threshold is 130C with 20C of hysteresis. Once an over-temperature or over-current fault conditions is removed, the output voltage automatically recovers.
Control Loop
The AAT2783 is a peak current mode step-down converter. The current through the P-channel MOSFET (high side) is sensed for current loop control, as well as shortcircuit and overload protection. A fixed slope compensation signal is added to the sensed current to maintain
Under-Voltage Lockout
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PRODUCT DATASHEET
AAT2783
1.2 s * VO A
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
L= 0.75 * VO 0.75 * VO = m A 0.6 s s 1.7V = 2.0H A
Internal bias of all circuits is controlled via the VIN input. Under-voltage lockout (UVLO) guarantees sufficient VIN bias and proper operation of all internal circuitry prior to activation.
Component Selection
Inductor Selection--Channel 1
The step-down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation requirements. The inductor should be set equal to the output voltage numeric value in H. This guarantees that there is sufficient internal slope compensation. Manufacturer's specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the saturation characteristics. The inductor should not show any appreciable saturation under normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. For Channel 1, the 1.5H LQH32PN1R5NN0L series Murata inductor has a 68.4m worst case DCR and a 1.75A DC current rating. At full 1A load, the inductor DC loss is 68.4mW which gives less than 6% loss in efficiency for a 1A, 1.2V output.
= 1.2
In this case a standard 2.2H value is selected. Manufacturer's specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the inductor's saturation characteristics. The inductor should not show any appreciable saturation under all normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. For Channel 2, the 2.2H GLF2518T2R2M series TDK inductor has a 104m worst case DCR and a 475mA DC current rating. At full 300mA load, the inductor DC loss is 10mW which gives less than 1% loss in efficiency for a 300mA, 3.3V output.
Input Capacitor
Select a 10F to 22F X7R or X5R ceramic capacitor for the VP1 and VP2 inputs. To estimate the required input capacitor size, determine the acceptable input ripple level (VPP) and solve for C. The calculated value varies with input voltage and is a maximum when VIN is double the output voltage.
Inductor Selection--Channel 2
The step-down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation requirements. The internal slope compensation for the adjustable and low voltage fixed versions of the AAT2783 is 0.6A/s. This equates to a slope compensation that is 75% of the inductor current down slope for a 1.8V output and 2.2H inductor.
CIN =
V VO * 1- O VIN VIN
VPP - ESR * FS IO
VO V 1 * 1 - O = for VIN = 2 * VO VIN VIN 4 CIN(MIN) = 1
VPP - ESR * 4 * FS IO
m=
0.75 VO 0.75 1.8V A = = 0.6 L 2.2H s
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
not affect the converter performance, a high ESR tantalum or aluminum electrolytic should be placed in parallel with the low ESR/ESL bypass ceramic capacitor. This dampens the high Q network and stabilizes the system.
Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the proper value. For example, the capacitance of a 10F, 6.3V, X5R ceramic capacitor with 5.0V DC applied is actually about 6F. The maximum input capacitor RMS current is:
Output Capacitor--Channel 1
The output capacitor limits the output ripple and provides holdup during large load transitions. A 10F to 22F X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. The output voltage droop due to a load transient is dominated by the capacitance of the ceramic output capacitor. During a step increase in load current, the ceramic output capacitor alone supplies the load current until the loop responds. Within two or three switching cycles, the loop responds and the inductor current increases to match the load current demand. The relationship of the output voltage droop during the three switching cycles to the output capacitance can be estimated by:
IRMS = IO *
VO V * 1- O VIN VIN
The input capacitor RMS ripple current varies with the input and output voltage and will always be less than or equal to half of the total DC load current.
VO V * 1- O = VIN VIN
for VIN = 2 * VO
D * (1 - D) =
0.52 =
1 2
IRMS(MAX) =
VO
IN
IO 2
The term V V appears in both the input voltage ripple and input capacitor RMS current equations and is a maximum when VO is twice VIN. This is why the input voltage ripple and the input capacitor RMS current ripple are a maximum at 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the AAT2783. Low ESR/ESL X7R and X5R ceramic capacitors are ideal for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the high frequency content of the input current localized, minimizing EMI and input voltage ripple. The proper placement of the input capacitor (C1) can be seen in the evaluation board layout in the Layout section of this datasheet (see Figure 2). A laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. The inductance of these wires, along with the low-ESR ceramic input capacitor, can create a high Q network that may affect converter performance. This problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain measurements can also result. Since the inductance of a short PCB trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. In applications where the input power source lead inductance cannot be reduced to a level that does
IN
V * 1- O
COUT =
3 * ILOAD VDROOP * FS
Once the average inductor current increases to the DC load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. The internal voltage loop compensation also limits the minimum output capacitor value to 10F. This is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater phase margin.
Output Capacitor--Channel 2
The output capacitor limits the output ripple and limits droop during large load transitions. A 4.7F to 10F X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple.
Adjustable Output Resistor Selection
The output voltages on the two AAT2783 buck converters are programmed with external feedback resistors R3, R5 and R2, R4. To limit the bias current required for the external feedback resistor string while maintaining good noise immunity, the minimum suggested value for
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
input power source, a CIN capacitor will be needed for stable operation. CIN should be located as closely to the device VIN3 pin as practically possible. CIN values greater than 2.2F will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN. However, for 400mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices.
R2, R4 is 59k. Although a larger value will further reduce quiescent current, it will also increase the impedance of the feedback node, making it more sensitive to external noise and interference. Table 1 summarizes the resistor values for various output voltages with R2, R4 set to either 59k for good noise immunity or 221k for reduced no load input current.
VOUT = 0.6V * 1 +
R3, R5 R2, R4
R2, R4 = 221k R3, R5 (k)
75 113 150 187 221 261 301 332 442 464 523 715 1000
VOUT (V)
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.8 1.85 2.0 2.5 3.3
R2, R4 = 59k R3, R5 (k)
19.6 29.4 39.2 49.9 59.0 68.1 78.7 88.7 118 124 137 187 267
Output Capacitor
For proper load voltage regulation and operational stability, a capacitor is required between pins VOUT3 and GND. The COUT capacitor connection to the LDO regulator ground pin should be made as direct as practically possible for maximum device performance. The AAT2783 has been specifically designed to function with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended. Typical output capacitor values for maximum output current conditions range from 4.7F to 10F. Applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the AAT2783 should use 10F or greater for COUT. If desired, COUT may be increased without limit.
Table 1: AAT2783 Resistor Values for Various Output Voltages.
Channel 3: 400mA Low Dropout (LDO) Converter
The Channel 3 LDO converter is used to post-regulate the channel 2 step-down buck converter and provide a quiet output voltage. The input voltage is 1.7V and the output voltage is set to 1.2V. The output current is 400 mA. The channel 2 buck converter efficiency at full load is 85% and the LDO efficiency is 70%. Combined post-regulated efficiency at full load is 60%. The LDO will turn on when EN3 is high and VOUT2 has come into regulation.
Thermal Calculations
There are three types of losses associated with the AAT2783 step-down converters: switching losses, conduction losses, and quiescent current losses. Conduction losses are associated with the RDS(ON) characteristics of the power output switching devices. Switching losses are dominated by the gate charge of the power output switching devices. At full load, assuming continuous conduction mode (CCM), a simplified form of the losses for each step-down is given by:
Component Selection
Input Capacitor
Typically, a 2.2F or larger capacitor is recommended for CIN in most applications. A CIN capacitor is not required for basic LDO regulator operation. However, if the AAT2783 is physically located more than three centimeters from an
PTOTAL(Step-down) =
IO2 * (RDS(ON)H * VO + RDS(ON)L * [VIN - VO]) VIN
+ [(tsw * FS * IOUT + IQ) * VIN]
IQ is the step-down converter quiescent current. The term tsw is used to estimate the full load step-down converter switching losses. For the condition where the
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Layout
The suggested PCB layout for the AAT2783 is shown in Figures 2 and 3. The following guidelines should be used to help ensure a proper layout. 1. The power input capacitors (C6) should be connected as closely as possible to VP1 and VP2, The LDO input capacitor (C3) should be close to VIN3 as shown in Figure 2. Due to the pin placement of VP1, VP2 and VIN3 for all converters, proper decoupling is not possible with just one input capacitor. C4 is a bypass capacitor for the VIN supply pin for the device C8 and L1, C5 and L2 should be connected as closely as possible. The connection of L1 and L2 to the LX1 and LX2 pins should be as short as possible. The feedback trace or FB pin should be separate from any power trace and connect as closely as possible to the load point. Sensing along a high-current load trace will degrade DC load regulation. The resistance of the trace from the load returns to GND1, GND2, and AGND should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground. Connect unused signal pins to ground to avoid unwanted noise coupling. For good thermal coupling, PCB vias are required from the pad for the TDFN paddle to the ground plane. The via diameter should be 0.3mm to 0.33mm and positioned on a 1.2mm grid.
step-down converter is in dropout at 100% duty cycle, the total device dissipation reduces to:
PTOTAL(Step-down) = IO2 * RDSON(H) + IQ * VIN
Since RDS(ON), quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. The AAT2783 LDO is designed to deliver a continuous output load current up to 400mA under normal operating conditions. The limiting characteristic for the maximum output load safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. In order to obtain high operating currents, careful device layout and circuit operating conditions must be taken into account. This calculation accounts for the total power dissipation of the LDO regulator, including that caused by ground current.
2. 3.
4.
5.
PTOTAL(LDO) = (VIN3 - VOUT3)IOUT3 + (VIN3 - IQ3)
Add the total losses of the two step-down converters and the LDO to determine the max junctions temperature. The maximum junction temperature can be derived from the JA for the TDFN34-16 which is 50C/W.
6. 7.
TJ(MAX) = PTOTAL * JA + TAMB
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
AAT2783 Schematic
Triple Output PMIC: Dual Buck with Low-VIN LDO
VCC C1 N.A. R2
2
C2 P1 10F 1
C3 2.2F
R1 0
R3 107K U1
1 2
VOUT3
1 1 2 3
VCC
1 2 3
59K
AAT2783 OUT3 VIN3 LX2 GND2 VP2 VP1 GND1 LX1 EP
16 15 14 13
VOUT1 VOUT2 L2 2.2H 1.7V@ 0.4A VOUT2 P2 C5 4.7F P3 GND P4 P5 VCC GND
EN3 VCC C4 VCC 0.1F C7 0.01F
FB2 EN3 VIN AGND BYP EN2 EN1 FB1
EN3
3 4 5
3
1 2 3
EN2
C6
12
10F
11 10 9
EN2
6 7
4
VCC
1 2 3
8
C8 L1 1.5H 10F P6
EN1
EN1 R4 59K R5 59K C9 N.A.
1.2V@1A VOUT1
Symbol
U1 L2 L1 C2, C6, C8 C2, C5 C9 R2-R6
Part Number
AAT2783 GLC2518T2R2M LQH32PN1R5NN0L
Description
AnalogicTech AAT2783 Two Buck, One LDO 3x4 TDFN TDK 2.2H Chip Inductor, ISAT = 475mA, 1007 case Murata 1.5H Inductor, ISAT = 1.75A, 3.2x2.5x1.7mm *Generic, MLC, 0603, 10F/6.3V Cap *Generic, MLC, 0603, 4.7F/6.3V Cap Generic, MLC, 0402, 56pF/50V Generic, 0402 Resistors
Quantity
1 2 1 3 2 1 6
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Figure 2: AAT2783 Evaluation Board Component Side Layout.
Figure 3: AAT2783 Evaluation Board Solder Side Layout.
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PRODUCT DATASHEET
AAT2783
SystemPowerTM
Ordering Information
Voltage Package
TDFN34-16
Triple Output PMIC: Dual Buck with Low-VIN LDO
Channel 1
0.6
Channel 2
0.6
Channel 3
1.2
Marking1
3BXYY
Part Number (Tape and Reel)2
AAT2783IRN-AAE-T1
All AnalogicTech products are offered in Pb-free packaging. The term "Pb-free" means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/about/quality.aspx.
Legend Voltage
Adjustable (0.6) 1.2
Code
A E
Package Information
TDFN34-16
3.000 0.050 1.600 0.050 Detail "A" Index Area
4.000 0.050
3.300 0.050
0.350 0.100
Top View
Bottom View
C0.3 0.230 0.050
(4x) 0.850 MAX
0.050 0.050
0.229 0.051
Side View Detail "A"
All dimensions in millimeters.
1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.
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0.450 0.050
Pin 1 Indicator (optional)
21
PRODUCT DATASHEET
AAT2783
SystemPowerTM
Triple Output PMIC: Dual Buck with Low-VIN LDO
Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611
(c) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech's terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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